1. Field of the Invention
The invention relates to charge injection devices (CID) for sensing IR image intensity information obtained from a two dimensional array of dual-gate sensing sites on an InSb or HgCdTe substrate, and more particularly to a novel readout circuit which while operating in the charge sharing mode (CSM) in extracting image information, provides correction of the subtractive or photocurrent effect present when the CSM mode is used.
2. Prior Art
Dual-gate charge-injection devices are solid-state self-scanned focal plane mosaics that employ surface charge transfer/injection to achieve full X-Y address capability for area arrays. The charge transfer takes place between the row and column sites (and vice versa) at a dual-gate site. The injection represents the injection of charge into the substrate from the dual-gate site accompanied by a flow of charge at the input of the preamplifier of the readout circuit. Sensor arrays of this design offer great flexibility because of the inherently simple structure. The design facilitates on-site noise-free signal integration and kTC and l/f noise suppression when read out using correlated double sampling (CDS).
Recent progress in InSb metal-insulator-semiconductor (MIS) processing and CID readout technology has led to 128.times.128 infrared sensor arrays accompanied by Si metal-oxide-semiconductor (MOS) scanner/preamplifiers (2) constituting the readout circuitry.
The success of the visible Si CID two dimensional sensor array is due to the mature Si MIS technology. In other semiconductors such as InSb, however, the dielectric process is not yet well developed. Dual-gate CID area arrays require good charge transfer. The existence of states or traps at the oxide semiconductor interface severely inhibits rapid charge transfer. As a consequence, the major technical difficulty in the implementation of large infrared CID area arrays has been the charge transfer inefficiency. To achieve better charge transfer, the arrays are often operated with a bias charge in the potential well. The bias charge in this readout scheme, known as the charge sharing mode (CSM), serves to keep the interface states or traps filled. Unfortunately, the signal charge in the CSM is shared by the dual-potential wells of the coupled gates and consequently can not be read out completely. This uniform loss in signal represents a degradation in readout efficiency. Furthermore, the continuous charge integration that takes place in the sites interferes with the CID readout process, resulting in a "subtractive effect". The subtractive effect reduces the signal on an intra-column basis and introduces artifacts dependent on the signal strength experienced by the elements in the column.